# Bench : ../build/sesc.mem -c../build/sesc.conf -xb_8 ./crafty.mips # File : ./b/sesc_b_8_crafty.mips.bYxmJJ : Tue Apr 29 15:12:42 2008 Exe Speed Exe MHz Exe Time Sim Time (5000MHz) 262.660 KIPS 0.3118 MHz 480.310 secs 29.950 msec Proc Avg.Time BPType Total RAS BPred BTB BTAC 0 63.784 2bit 86.93% (100.00% of 6.82%) 85.97% (100.00% of 52.09%) 0.00% nInst BJ Load Store INT FP : LD Forward , Replay : Worst Unit (clk) 0 126158077 8.49% 28.48% 11.44% 51.60% 0.00% : 45.47% 81 inst/repl : ALUIssueX 0.13 Proc IPC Cycles Busy LDQ STQ IWin ROB Regs Ports TLB maxBr MisBr Br4Clk Other 0 0.84 149752000 28.1 0.1 0.0 2.8 3.7 12.0 0.0 2.1 0.0 50.1 0.0 1.1 ################################################################################ Proc Cache Occ MissRate (RD, WR) %DMemAcc MB/s : ... 0 DL1 0.0 0.62% ( 0.5%, 0.1%) 68.19% 0.45GB/s : Bus 630.863 MB/s : L2 0.0 5.67% ( 5.7%, 0.0%) 2.08% 0.13GB/s : MemBus 199.098 MB/s : ################################################################################ Proc Cache Occ MissRate (RD, WR) %DMemAcc MB/s : ... 0 IL1 0.0 3.55% ( 3.6%, 0.0%) 46.75% 1.79GB/s : L2 0.0 5.67% ( 5.7%, 0.0%) 2.08% 0.13GB/s : MemBus 199.098 MB/s : ################################################################################ L2Cache MissRate (RD, WR) 1024K 5.67% ( 5.7%, 0.0%)