Index: target/linux/ar7/files/include/asm-mips/ar7/ar7.h =================================================================== --- target/linux/ar7/files/include/asm-mips/ar7/ar7.h (revision 12608) +++ target/linux/ar7/files/include/asm-mips/ar7/ar7.h (working copy) @@ -58,10 +58,23 @@ #define AR7_GPIO_OUTPUT0x4 #define AR7_GPIO_DIR0x8 #define AR7_GPIO_ENABLE0xc +#define TITAN_GPIO_INPUT_00x0 +#define TITAN_GPIO_INPUT_10x4 +#define TITAN_GPIO_OUTPUT_00x8 +#define TITAN_GPIO_OUTPUT_10xc +#define TITAN_GPIO_DIR_00x10 +#define TITAN_GPIO_DIR_10x14 +#define TITAN_GPIO_ENBL_00x18 +#define TITAN_GPIO_ENBL_10x1c #define AR7_CHIP_71000x18 #define AR7_CHIP_72000x2b #define AR7_CHIP_73000x05 +#define AR7_CHIP_TITAN0x07 +#define TITAN_CHIP_10500x0f +#define TITAN_CHIP_10550x0e +#define TITAN_CHIP_10560x0d +#define TITAN_CHIP_10600x07 /* Interrupts */ #define AR7_IRQ_UART015 Index: target/linux/ar7/files/include/asm-mips/ar7/gpio.h =================================================================== --- target/linux/ar7/files/include/asm-mips/ar7/gpio.h (revision 12608) +++ target/linux/ar7/files/include/asm-mips/ar7/gpio.h (working copy) @@ -21,12 +21,13 @@ #include #define AR7_GPIO_MAX 32 +#define TITAN_GPIO_MAX 51 extern int gpio_request(unsigned gpio, const char *label); extern void gpio_free(unsigned gpio); /* Common GPIO layer */ -static inline int gpio_get_value(unsigned gpio) +static inline int gpio_get_value_ar7(unsigned gpio) { void __iomem *gpio_in = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT); @@ -34,8 +35,24 @@ return readl(gpio_in) & (1 << gpio); } -static inline void gpio_set_value(unsigned gpio, int value) +static inline int gpio_get_value_titan(unsigned gpio) { +void __iomem *gpio_in0 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0); +void __iomem *gpio_in1 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_1); + +return readl(gpio >> 5 ? gpio_in1 : gpio_in0) & (1 << (gpio & 0x1f)); +} + +static inline int gpio_get_value(unsigned gpio) +{ +return ar7_chip_id() == AR7_CHIP_TITAN ? gpio_get_value_titan(gpio) : +gpio_get_value_ar7(gpio); +} + +static inline void gpio_set_value_ar7(unsigned gpio, int value) +{ void __iomem *gpio_out = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT); unsigned tmp; @@ -46,8 +63,30 @@ writel(tmp, gpio_out); } -static inline int gpio_direction_input(unsigned gpio) +static inline void gpio_set_value_titan(unsigned gpio, int value) { +void __iomem *gpio_out0 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_0); +void __iomem *gpio_out1 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_1); +unsigned tmp; + +tmp = readl(gpio >> 5 ? gpio_out1 : gpio_out0) & ~(1 << (gpio & 0x1f)); +if (value) +tmp |= 1 << (gpio & 0x1f); +writel(tmp, gpio >> 5 ? gpio_out1 : gpio_out0); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ +if (ar7_chip_id() == AR7_CHIP_TITAN) +gpio_set_value_titan(gpio, value); +else +gpio_set_value_ar7(gpio, value); +} + +static inline int gpio_direction_input_ar7(unsigned gpio) +{ void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); @@ -59,8 +98,31 @@ return 0; } -static inline int gpio_direction_output(unsigned gpio, int value) +static inline int gpio_direction_input_titan(unsigned gpio) { +void __iomem *gpio_dir0 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0); +void __iomem *gpio_dir1 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1); + +if (gpio >= TITAN_GPIO_MAX) +return -EINVAL; + +writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) | (1 << (gpio & 0x1f)), +gpio >> 5 ? gpio_dir1 : gpio_dir0); + +return 0; +} + +static inline int gpio_direction_input(unsigned gpio) +{ +return ar7_chip_id() == AR7_CHIP_TITAN ? +gpio_direction_input_titan(gpio) : +gpio_direction_input_ar7(gpio); +} + +static inline int gpio_direction_output_ar7(unsigned gpio, int value) +{ void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); @@ -73,6 +135,30 @@ return 0; } +static inline int gpio_direction_output_titan(unsigned gpio, int value) +{ +void __iomem *gpio_dir0 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0); +void __iomem *gpio_dir1 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1); + +if (gpio >= TITAN_GPIO_MAX) +return -EINVAL; + +gpio_set_value_titan(gpio, value); +writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) & ~(1 << +(gpio & 0x1f)), gpio >> 5 ? gpio_dir1 : gpio_dir0); + +return 0; +} + +static inline int gpio_direction_output(unsigned gpio, int value) +{ +return ar7_chip_id() == AR7_CHIP_TITAN ? +gpio_direction_output_titan(gpio, value) : +gpio_direction_output_ar7(gpio, value); +} + static inline int gpio_to_irq(unsigned gpio) { return -EINVAL; @@ -84,7 +170,7 @@ } /* Board specific GPIO functions */ -static inline int ar7_gpio_enable(unsigned gpio) +static inline int ar7_gpio_enable_ar7(unsigned gpio) { void __iomem *gpio_en = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); @@ -94,8 +180,27 @@ return 0; } -static inline int ar7_gpio_disable(unsigned gpio) +static inline int ar7_gpio_enable_titan(unsigned gpio) { +void __iomem *gpio_en0 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENABLE_0); +void __iomem *gpio_en1 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENABLE_1); + +writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) | (1 << (gpio & 0x1f)), +igpio >> 5 ? gpio_en1 : gpio_en0); + +return 0; +} + +static inline int ar7_gpio_enable(unsigned gpio) +{ +return ar7_chip_id() == AR7_CHIP_TITAN ? ar7_gpio_enable_titan(gpio) : +ar7_gpio_enable_ar7(gpio); +} + +static inline int ar7_gpio_disable_ar7(unsigned gpio) +{ void __iomem *gpio_en = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); @@ -104,6 +209,25 @@ return 0; } +static inline int ar7_gpio_disable_titan(unsigned gpio) +{ +void __iomem *gpio_en0 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENABLE_0); +void __iomem *gpio_en1 = +(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENABLE_1); + +writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) & ~(1 << (gpio & 0x1f)), +gpio >> 5 ? gpio_en1 : gpio_en0); + +return 0; +} + +static inline int ar7_gpio_disable(unsigned gpio) +{ +return ar7_chip_id() == AR7_CHIP_TITAN ? ar7_gpio_disable_titan(gpio) : +ar7_gpio_disable_ar7(gpio); +} + #include #endif Index: target/linux/ar7/files/arch/mips/ar7/gpio.c =================================================================== --- target/linux/ar7/files/arch/mips/ar7/gpio.c (revision 12608) +++ target/linux/ar7/files/arch/mips/ar7/gpio.c (working copy) @@ -21,11 +21,12 @@ #include -static const char *ar7_gpio_list[AR7_GPIO_MAX]; +static const char *ar7_gpio_list[TITAN_GPIO_MAX]; int gpio_request(unsigned gpio, const char *label) { -if (gpio >= AR7_GPIO_MAX) +if (gpio >= (ar7_chip_id() == AR7_CHIP_TITAN ? TITAN_GPIO_MAX : +AR7_GPIO_MAX)) return -EINVAL; if (ar7_gpio_list[gpio]) Index: target/linux/ar7/files/arch/mips/ar7/setup.c =================================================================== --- target/linux/ar7/files/arch/mips/ar7/setup.c (revision 12608) +++ target/linux/ar7/files/arch/mips/ar7/setup.c (working copy) @@ -62,6 +62,17 @@ return "TI AR7 (TNETD7100)"; case AR7_CHIP_7200: return "TI AR7 (TNETD7200)"; +case AR7_CHIP_TITAN: +switch ((gpio_get_value_titan(1) >> 12) & 0xf) { +case TITAN_CHIP_1050: +return "TI AR7 (TNETV1050)"; +case TITAN_CHIP_1055: +return "TI AR7 (TNETV1055)"; +case TITAN_CHIP_1056: +return "TI AR7 (TNETV1056)"; +case TITAN_CHIP_1060: +return "TI AR7 (TNETV1060)"; +} default: return "TI AR7 (Unknown)"; } Index: target/linux/ar7/files/drivers/char/ar7_gpio.c =================================================================== --- target/linux/ar7/files/drivers/char/ar7_gpio.c (revision 12608) +++ target/linux/ar7/files/drivers/char/ar7_gpio.c (working copy) @@ -98,7 +98,8 @@ { int m = iminor(inode); -if (m >= AR7_GPIO_MAX) +if (m >= (ar7_chip_id() == AR7_CHIP_TITAN ? TITAN_GPIO_MAX : +AR7_GPIO_MAX)) return -EINVAL; return nonseekable_open(inode, file);