diff --git a/shared-core/radeon_drm.h b/shared-core/radeon_drm.h
index ffaa46e..ae2ece7 100644
--- a/shared-core/radeon_drm.h
+++ b/shared-core/radeon_drm.h
@@ -677,6 +677,7 @@ typedef struct drm_radeon_indirect {
 #define RADEON_PARAM_VBLANK_CRTC           13   /* VBLANK CRTC */
 #define RADEON_PARAM_FB_LOCATION           14   /* FB location */
 #define RADEON_PARAM_NUM_GB_PIPES          15   /* num GB pipes */
+#define RADEON_PARAM_NUM_SAMPLES           16   /* occlusion query */
 
 typedef struct drm_radeon_getparam {
 	int param;
diff --git a/shared-core/radeon_state.c b/shared-core/radeon_state.c
index 57e3a3b..1f1adc4 100644
--- a/shared-core/radeon_state.c
+++ b/shared-core/radeon_state.c
@@ -3100,6 +3100,24 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
 	case RADEON_PARAM_NUM_GB_PIPES:
 		value = dev_priv->num_gb_pipes;
 		break;
+	case RADEON_PARAM_NUM_SAMPLES:
+		if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) {
+			int i;
+			RING_LOCALS
+			u32 ptr = RADEON_READ(RADEON_CP_RB_RPTR_ADDR) + 0x30;
+			value = 0;
+			BEGIN_RING(4 * dev_priv->num_gb_pipes + 2);
+			for (i = 0; i < dev_priv->num_gb_pipes; i++) {
+				OUT_RING_REG(R500_SU_REG_DEST, i);
+				OUT_RING_REG(R300_ZB_ZPASS_ADDR, ptr + (i * 4));
+			}
+			OUT_RING_REG(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
+			ADVANCE_RING();
+		} else {
+			DRM_ERROR("Occlusion query requested for pre-r300 chipset\n");
+			return -EINVAL;
+		}
+		break;
 	default:
 		DRM_DEBUG( "Invalid parameter %d\n", param->param );
 		return -EINVAL;