Index: target-i386/translate.c =================================================================== RCS file: /cvsroot/qemu/qemu/target-i386/translate.c,v retrieving revision 1.59 diff -u -r1.59 translate.c --- target-i386/translate.c 10 Jul 2006 19:53:04 -0000 1.59 +++ target-i386/translate.c 18 Aug 2006 22:59:56 -0000 @@ -5795,6 +5795,78 @@ goto illegal_op; } break; +#if 1 + case 0x119 ... 0x11e: + /* noop */ + printf("reserved %04X %s\n", b, (prefixes & PREFIX_DATA) ? ": 0x66" : ""); + goto illegal_op; + break; + case 0x11f: + { + /* multi-byte noop */ + /* NOOP patterns */ + /* + * 3 1 0F 1F 00 + * 4 2 0F 1F 40 00 + * 5 2 0F 1F 44 00 00 + * 6 2 66 0F 1F 44 00 00 + * 7 4 0F 1F 80 00 00 00 00 + * 8 5 0F 1F 84 00 00 00 00 00 + * 9 5 66 0F 1F 84 00 00 00 00 00 + */ + int noop_displ = 0; + + modrm = ldub_code(s->pc++); + rm = modrm & 7; + mod = (modrm >> 6) & 3; + reg = (modrm >> 3) & 7; + + printf("+++ multibyte nop %04X %04X %04X\n", mod, reg, rm); + + if (reg != 0) + { + printf("multibyte nop %04X %s illegal reg %d\n", b, (prefixes & PREFIX_DATA) ? ": 0x66" : "", reg); + goto illegal_op; + } + + if (rm == 0x04) + { + /* 8bit SIB follows */ + noop_displ += 1; + } + + switch (mod) + { + case 0x00: + if (rm == 0x05) + { + /* 32bit data follows */ + noop_displ += 4; + } + /* else register is specified */ + break; + case 0x01: + /* 8bit data follows */ + noop_displ += 1; + break; + case 0x10: + /* 32bit data follows */ + noop_displ += 4; + break; + case 0x11: + default: + /* register is specified */ + break; + } + + printf("nop %04X %s + %d-byte IM\n", b, (prefixes & PREFIX_DATA) ? ": 0x66" : "", noop_displ); + + /* skip the remainder */ + s->pc += noop_displ; + } + break; +#endif + case 0x120: /* mov reg, crN */ case 0x122: /* mov crN, reg */ if (s->cpl != 0) {