diff --git a/src/mesa/drivers/dri/r200/r200_blit.c b/src/mesa/drivers/dri/r200/r200_blit.c index e187fc0..883b080 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.c +++ b/src/mesa/drivers/dri/r200/r200_blit.c @@ -448,6 +448,7 @@ unsigned r200_blit(GLcontext *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, + unsigned src_tiling, unsigned src_pitch, unsigned src_width, unsigned src_height, @@ -456,6 +457,7 @@ unsigned r200_blit(GLcontext *ctx, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, + unsigned dst_tiling, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, diff --git a/src/mesa/drivers/dri/r200/r200_blit.h b/src/mesa/drivers/dri/r200/r200_blit.h index 53206f0..fc126de 100644 --- a/src/mesa/drivers/dri/r200/r200_blit.h +++ b/src/mesa/drivers/dri/r200/r200_blit.h @@ -36,6 +36,7 @@ unsigned r200_blit(GLcontext *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, + unsigned src_tiling, unsigned src_pitch, unsigned src_width, unsigned src_height, @@ -44,6 +45,7 @@ unsigned r200_blit(GLcontext *ctx, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, + unsigned dst_tiling, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index 4ae0f30..870bf8a 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -38,6 +38,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "main/enums.h" #include "main/colormac.h" #include "main/light.h" +#include "main/context.h" #include "vbo/vbo.h" #include "tnl/tnl.h" @@ -486,7 +487,7 @@ static GLboolean r200_run_tcl_render( GLcontext *ctx, FIXME: OTOH, we're missing the case where a ATI_fragment_shader accesses the secondary color (if lighting is disabled). The chip seems misconfigured for that though elsewhere (tcl output, might lock up) */ - if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) { + if (NEED_SECONDARY_COLOR(ctx)) { map_rev_fixed[5] = VERT_ATTRIB_COLOR1; } diff --git a/src/mesa/drivers/dri/r200/r200_tex.c b/src/mesa/drivers/dri/r200/r200_tex.c index 6723b12..e601dc4 100644 --- a/src/mesa/drivers/dri/r200/r200_tex.c +++ b/src/mesa/drivers/dri/r200/r200_tex.c @@ -532,6 +532,7 @@ void r200InitTextureFuncs( radeonContextPtr radeon, struct dd_function_table *fu functions->GenerateMipmap = radeonGenerateMipmap; + functions->NewTextureImage = radeonNewTextureImage; functions->FreeTexImageData = radeonFreeTexImageData; functions->MapTexture = radeonMapTexture; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index 024e31f..1281aaa 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -532,6 +532,7 @@ struct radeon_context { struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, + unsigned src_tiling, unsigned src_pitch, unsigned src_width, unsigned src_height, @@ -540,6 +541,7 @@ struct radeon_context { struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, + unsigned dst_tiling, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index ddfde3e..ae422c4 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -128,12 +128,19 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree GLuint face, GLuint level, GLuint* curOffset) { radeon_mipmap_level *lvl = &mt->levels[level]; - GLuint height; + GLuint height, blocksize;; height = _mesa_next_pow_two_32(lvl->height); lvl->rowstride = get_texture_image_row_stride(rmesa, mt->mesaFormat, lvl->width, mt->tilebits); lvl->size = get_texture_image_size(mt->mesaFormat, lvl->rowstride, height, lvl->depth, mt->tilebits); + + + blocksize = _mesa_get_format_bytes(mt->mesaFormat); + if (blocksize == 8) + lvl->size = (lvl->size + 511) & ~511; + else if(blocksize == 16) + lvl->size = (lvl->size + 1023) & ~1023; assert(lvl->size > 0); diff --git a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c index 216eb93..6895167 100644 --- a/src/mesa/drivers/dri/radeon/radeon_pixel_read.c +++ b/src/mesa/drivers/dri/radeon/radeon_pixel_read.c @@ -158,6 +158,7 @@ do_blit_readpixels(GLcontext * ctx, rrb->bo, rrb->draw_offset, rrb->base.Format, + 0, rrb->pitch / rrb->cpp, rrb->base.Width, rrb->base.Height, @@ -166,6 +167,7 @@ do_blit_readpixels(GLcontext * ctx, dst_buffer, dst_offset, dst_format, + 0, aligned_rowstride / _mesa_get_format_bytes(dst_format), width, height, diff --git a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c index 4cb0bb6..cd06fed 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tex_copy.c +++ b/src/mesa/drivers/dri/radeon/radeon_tex_copy.c @@ -132,9 +132,9 @@ do_copy_texsubimage(GLcontext *ctx, } /* blit from src buffer to texture */ - return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, rrb->pitch/rrb->cpp, + return radeon->vtbl.blit(ctx, rrb->bo, src_offset, src_mesaformat, 0, rrb->pitch/rrb->cpp, src_width, rrb->base.Height, x, y, - timg->mt->bo, dst_offset, dst_mesaformat, + timg->mt->bo, dst_offset, dst_mesaformat, 0, timg->mt->levels[level].rowstride / dst_bpp, dst_width, timg->base.Height, dstx, dsty, width, height, flip_y); diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index 8c6a50d..be5d865 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -108,6 +108,7 @@ void radeonFreeTexImageData(GLcontext *ctx, struct gl_texture_image *timage) /* Set Data pointer and additional data for mapped texture image */ static void teximage_set_map_data(radeon_texture_image *image) { + GLuint bw, bh; radeon_mipmap_level *lvl; if (!image->mt) { @@ -120,7 +121,8 @@ static void teximage_set_map_data(radeon_texture_image *image) lvl = &image->mt->levels[image->mtlevel]; image->base.Data = image->mt->bo->ptr + lvl->faces[image->mtface].offset; - image->base.RowStride = lvl->rowstride / _mesa_get_format_bytes(image->base.TexFormat); + _mesa_get_format_block_size(image->base.TexFormat, &bw, &bh); + image->base.RowStride = lvl->rowstride / (_mesa_get_format_bytes(image->base.TexFormat) * bw); }