library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity keyboardVhdl is
	Port (	
		CLK, RST, KD, KC: in std_logic;
		keyboard : out std_logic_vector(2 downto 0)
		);
end keyboardVhdl;


architecture Behavioral of keyboardVhdl is

	------------------------------------------------------------------------
	-- Signal Declarations
	------------------------------------------------------------------------
	signal clkDiv : std_logic_vector (3 downto 0);
	signal pclk : std_logic;
	signal KDI, KCI : std_logic;
	signal DFF1, DFF2 : std_logic;
	signal shiftRegSig1: std_logic_vector(10 downto 0);
	signal shiftRegSig2: std_logic_vector(10 downto 1);
	signal keyOutput : std_logic_vector(2 downto 0);
--	signal keyOutputCount : std_logic_vector(2 downto 0);
	
	--Output Keycodes (to tetris game)
	constant key_nothing : std_logic_vector(2 downto 0) := "000";
	constant key_left : std_logic_vector(2 downto 0) := "001";
	constant key_right : std_logic_vector(2 downto 0) := "010";
	constant key_down : std_logic_vector(2 downto 0) := "011";
	
	--Input Keycodes (The ones the keyboard sends)
	constant code_A : std_logic_vector (7 downto 0) := "00011100"; -- 1C 
	constant code_D : std_logic_vector (7 downto 0) := "00100011"; -- 23
	constant code_S : std_logic_vector (7 downto 0) := "00011011"; -- 1B
	constant code_W : std_logic_vector (7 downto 0) := "00011101"; -- 1D

	
	------------------------------------------------------------------------
	-- Module Implementation
	------------------------------------------------------------------------

	begin
	
	keyboard <= keyOutput;
	--keycount <= keyOutputCount;
	
	--Divide the master clock down to a lower frequency--
	CLKDivider: Process (CLK)
	begin
		if (CLK = '1' and CLK'Event) then 
			clkDiv <= clkDiv +1; 
		end if;	
	end Process;

	pclk <= clkDiv(3);

	--Flip Flops used to condition siglans coming from PS2--
	Process (pclk, RST, KC, KD)
	begin
		if(RST = '1') then
			DFF1 <= '0'; DFF2 <= '0'; KDI <= '0'; KCI <= '0';
		else												
			if (pclk = '1' and pclk'Event) then
				DFF1 <= KD;
				KDI <= DFF1;
				DFF2 <= KC;
				KCI <= DFF2;
			end if;
		end if;
	end process;
	
	


	--Shift Registers used to clock in scan codes from PS2--
	Process(KDI, KCI, RST) --DFF2 carries KD and DFF4, and DFF4 carries KC
	begin
		if (RST = '1') then
			ShiftRegSig1 <= "00000000000";
			ShiftRegSig2 <= "0000000000";
		else
			if (KCI = '0' and KCI'Event) then
				ShiftRegSig1(10 downto 0) <= KDI & ShiftRegSig1(10 downto 1);
				ShiftRegSig2(10 downto 1) <= ShiftRegSig1(0) & ShiftRegSig2(10 downto 2);
			end if;
		end if;
	end process;
	
	--Wait Register
	process(ShiftRegSig1, ShiftRegSig2, RST, KCI)
	begin
		if(RST = '1')then
			keyOutput <= key_nothing;
		else
			if(KCI'event and KCI = '1') then
				if (ShiftRegSig2(8 downto 1) = "11110000")then 
					case ShiftRegSig1(8 downto 1) is
						when code_A =>
							keyOutput <= key_left;
						when code_S =>
							keyOutput <= key_down;
						when code_D =>
							keyOutput <= key_right;
						when others =>
							keyOutput <= key_nothing;
					end case;
				else

					keyOutput <= key_nothing;
				end if;
			end if;
		end if;
	end Process;

end Behavioral;