Index: sleep.S
===================================================================
RCS file: /cvs/linux/kernel26/arch/arm/mach-pxa/sleep.S,v
retrieving revision 1.12
diff -u -r1.12 sleep.S
--- sleep.S	14 Apr 2006 18:40:56 -0000	1.12
+++ sleep.S	18 Jun 2006 07:12:27 -0000
@@ -244,6 +244,11 @@
 	mov	r0, #PSR_I_BIT | PSR_F_BIT | MODE_SVC	@ set SVC, irqs off
 	msr	cpsr_c, r0
 
+//pH5 debug
+	ldr r0, =0x40e00018			@ set GPIO 22 (vibra)
+	mov r2, #0x00400000
+	str r2, [r0]
+
 	ldr	r0, sleep_save_sp		@ stack phys addr
 	ldr	r2, =resume_after_mmu		@ its absolute virtual address
 	ldmfd	r0, {r3 - r9, sp}		@ CP regs + virt stack ptr
@@ -256,12 +261,18 @@
 	bic     r9, r9, #0x0004			@ see cpu_xscale_proc_init
 #endif
 
+//pH5 debug
+	ldr r3, =0x40e00024			@ clear GPIO 22 (vibra)
+	mov r4, #0x00400000
+	str r4, [r3]
+
 	mcr	p14, 0, r3, c6, c0, 0		@ clock configuration, turbo mode.
 	mcr	p15, 0, r4, c15, c1, 0		@ CP access reg
 	mcr	p15, 0, r5, c13, c0, 0		@ PID
 	mcr 	p15, 0, r6, c3, c0, 0		@ domain ID
 	mcr 	p15, 0, r7, c2, c0, 0		@ translation table base addr
 	mcr	p15, 0, r8, c1, c1, 0           @ auxiliary control reg
+
 	b	resume_turn_on_mmu		@ cache align execution
 
 	.align 5
@@ -284,6 +295,7 @@
 #ifdef CONFIG_XSCALE_CACHE_ERRATA
 	bl	cpu_xscale_proc_init
 #endif
+
 	ldmfd	sp!, {r2, r3}
 #ifndef CONFIG_IWMMXT
 	mar	acc0, r2, r3