void enc28j60Init(uint8_t* macaddr) {
	// initialize I/O
	ENC28J60_CS_DDR |= 1<<ENC28J60_CS;
	CSPASSIVE;
	//	
#ifdef ENC28J60_USART_SPI_MODE
	//cli();
	UBRR0 = 0;
	XCK_DDR |= (1<<XCK); // xck (sck) output
//	TXD_DDR |= (1<<TXD); // txd (mosi) output
	UCSR0C = (1<<UMSEL01)|(1<<UMSEL00)|(0<<UCPHA0)|(0<<UCPOL0);
	UCSR0B = (1<<RXEN0)|(1<<TXEN0);
	UBRR0 = 3;
	
	//sei();
	
#else
	DDRB  |= 1<<PB3 | 1<<PB5; // mosi, sck output
	cbi(DDRB,PINB4); // MISO is input
        //
	CSPASSIVE;
        cbi(PORTB,PB3); // MOSI low
        cbi(PORTB,PB5); // SCK low
	//
	// initialize SPI interface
	// master mode and Fosc/2 clock:
        SPCR = (1<<SPE)|(1<<MSTR);
        SPSR |= (1<<SPI2X);
#endif
...