Index: xatomic.h =================================================================== --- xatomic.h (revision 0) +++ xatomic.h (revision 12766) @@ -0,0 +1,61 @@ +/* -*- mode: c++; c-basic-offset: 4; indent-tabs-mode: nil; tab-width: 4 -*- */ +/* vi: set expandtab shiftwidth=4 tabstop=4: */ +/* RMHEADER + */ +#ifndef _Include_XATOMIC +#define _Include_XATOMIC + +#if defined(__i386) || defined(__ia64) || defined(__x86_64) +# if !defined(__ia64) && !defined(__x86_64) +#define LOCK_PREFIX \ + ".section .smp_locks,\"a\"\n" \ + " .align 4\n" \ + " .long 661f\n" /* address */ \ + ".previous\n" \ + "661:\n\tlock; " +# else +# define LOCK_PREFIX "lock ; " +# endif +#else +# error "Fix me!" +#endif + +struct xatomic_t { volatile int counter; }; + +inline int atomic_read( const xatomic_t* v ) { return v->counter; } +inline int atomic_set( xatomic_t* v, int i ) { return v->counter = i; } + +inline void atomic_add(int i, xatomic_t *v) +{ + __asm__ __volatile__( + LOCK_PREFIX "addl %1,%0" + :"=m" (v->counter) + :"ir" (i), "m" (v->counter)); +} + +inline void atomic_sub(int i, xatomic_t *v) +{ + __asm__ __volatile__( + LOCK_PREFIX "subl %1,%0" + :"=m" (v->counter) + :"ir" (i), "m" (v->counter)); +} + +inline void atomic_inc(xatomic_t *v) +{ + __asm__ __volatile__( + LOCK_PREFIX "incl %0" + :"=m" (v->counter) + :"m" (v->counter)); +} + +inline void atomic_dec(xatomic_t *v) +{ + __asm__ __volatile__( + LOCK_PREFIX "decl %0" + :"=m" (v->counter) + :"m" (v->counter)); +} + +#endif // _Include_XATOMIC + Index: AtomicInt.h =================================================================== --- AtomicInt.h (revision 12765) +++ AtomicInt.h (revision 12766) @@ -5,64 +5,8 @@ #ifndef _Include_ATOMIC_INT #define _Include_ATOMIC_INT -#if defined(__i386) && !defined(__ia64) -# define new n -# define unlikely(x) __builtin_expect(!!(x), 0) +#include -# define BITS_PER_LONG 32 -# define BITS_TO_LONGS(bits) \ - (((bits)+BITS_PER_LONG-1)/BITS_PER_LONG) -# define DECLARE_BITMAP(name,bits) \ - unsigned long name[BITS_TO_LONGS(bits)] - -# define hweight32(x) generic_hweight32(x) -# define hweight64(x) generic_hweight64(x) - -static inline unsigned int generic_hweight32(unsigned int w) -{ - unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555); - res = (res & 0x33333333) + ((res >> 2) & 0x33333333); - res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F); - res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF); - return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF); -} - -static inline unsigned long generic_hweight64(uint64_t w) -{ -# if BITS_PER_LONG < 64 - return generic_hweight32((unsigned int)(w >> 32)) + - generic_hweight32((unsigned int)w); -# else - u64 res; - res = (w & 0x5555555555555555ul) + ((w >> 1) & 0x5555555555555555ul); - res = (res & 0x3333333333333333ul) + ((res >> 2) & 0x3333333333333333ul); - res = (res & 0x0F0F0F0F0F0F0F0Ful) + ((res >> 4) & 0x0F0F0F0F0F0F0F0Ful); - res = (res & 0x00FF00FF00FF00FFul) + ((res >> 8) & 0x00FF00FF00FF00FFul); - res = (res & 0x0000FFFF0000FFFFul) + ((res >> 16) & 0x0000FFFF0000FFFFul); - return (res & 0x00000000FFFFFFFFul) + ((res >> 32) & 0x00000000FFFFFFFFul); -# endif -} - -# define read_cr4() ({ \ - unsigned int __dummy; \ - __asm__( \ - "movl %%cr4,%0\n\t" \ - :"=r" (__dummy)); \ - __dummy; \ -}) - -# define write_cr4(x) \ - __asm__ __volatile__("movl %0,%%cr4": :"r" (x)); - - -#endif // __i386 - -#include - -#if defined(__i386) && !defined(__ia64) -# undef new -#endif - #include /** @@ -79,7 +23,7 @@ class AtomicInt { private: - atomic_t fAtom; + xatomic_t fAtom; public: /**