int ist 15


/* Cascaded interrupts from IM0 */
void
danube_hw0_irqdispatch(void)
{
    u32 irq;

    irq = (*DANUBE_ICU_IM0_IOSR);
    /* if int_status == 0, then the interrupt has already been cleared */
    if (irq == 0) {
        return;
    }
    irq = ls1bit32 (irq);

    if (irq == 22) {
        /*clear EBU interrupt */
        *(DANUBE_EBU_PCC_ISTAT) |= 0x10;
    }

    printk("%s:%s[%d] %d\n", __FILE__, __func__, __LINE__, irq + INT_NUM_IM0_IRL0);

    do_IRQ ((int) irq + INT_NUM_IM0_IRL0);

    return;
}