0000:02:03.0 0607: 1217:6972
        Subsystem: 1584:3000
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 168
        Interrupt: pin A routed to IRQ 17
        Region 0: Memory at 20001000 (32-bit, non-prefetchable) [size=4K]
        Bus: primary=02, secondary=03, subordinate=06, sec-latency=176
        Memory window 0: 20400000-207ff000 (prefetchable)
        Memory window 1: 20800000-20bff000
        I/O window 0: 00004000-000040ff
        I/O window 1: 00004400-000044ff
        BridgeCtl: Parity- SERR- ISA- VGA- MAbort- >Reset- 16bInt- PostWrite+
        16-bit legacy interface ports at 0001
00: 17 12 72 69 87 00 10 04 00 00 07 06 00 a8 02 00
10: 00 10 00 20 a0 00 00 02 02 03 06 b0 00 00 40 20
20: 00 f0 7f 20 00 00 80 20 00 f0 bf 20 01 40 00 00
30: fd 40 00 00 01 44 00 00 fd 44 00 00 ff 01 00 05
40: 84 15 00 30 01 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

0000:03:00.0 0280: 1260:3890 (rev 01)
        Subsystem: 1385:4800
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Latency: 80 (2500ns min, 7000ns max), Cache Line Size: 0x20 (128 bytes)
        Interrupt: pin A routed to IRQ 17
        Region 0: Memory at 20800000 (32-bit, non-prefetchable) [size=8K]
        Capabilities: <available only to root>
00: 60 12 90 38 16 00 98 02 01 00 80 02 20 50 00 00
10: 00 00 80 20 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 01 08 00 00 85 13 00 48
30: 00 00 00 00 dc 00 00 00 00 00 00 00 11 01 0a 1c

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00