# cpuid eax in eax ebx ecx edx 00000000 00000001 68747541 444d4163 69746e65 00000001 00040fb2 00020800 00002001 178bfbff 80000000 80000018 68747541 444d4163 69746e65 80000001 00040fb2 000008cd 0000001f ebd3fbff 80000002 20444d41 6c687441 74286e6f 3620296d 80000003 32582034 61754420 6f43206c 50206572 80000004 65636f72 726f7373 30383320 00002b30 80000005 ff08ff08 ff20ff20 40020140 40020140 80000006 00000000 42004200 02008140 00000000 80000007 00000000 00000000 00000000 0000003f 80000008 00003028 00000000 00000001 00000000 80000009 00000000 00000000 00000000 00000000 8000000a 00000001 00000040 00000000 00000000 8000000b 00000000 00000000 00000000 00000000 8000000c 00000000 00000000 00000000 00000000 8000000d 00000000 00000000 00000000 00000000 8000000e 00000000 00000000 00000000 00000000 8000000f 00000000 00000000 00000000 00000000 80000010 00000000 00000000 00000000 00000000 80000011 00000000 00000000 00000000 00000000 80000012 00000000 00000000 00000000 00000000 80000013 00000000 00000000 00000000 00000000 80000014 00000000 00000000 00000000 00000000 80000015 00000000 00000000 00000000 00000000 80000016 00000000 00000000 00000000 00000000 80000017 00000000 00000000 00000000 00000000 80000018 00000000 00000000 00000000 00000000 Vendor ID: "AuthenticAMD"; CPUID level 1 AMD-specific functions Version 00040fb2: Family: 15 Model: 11 [] Standard feature flags 178bfbff: Floating Point Unit Virtual Mode Extensions Debugging Extensions Page Size Extensions Time Stamp Counter (with RDTSC and CR4 disable bit) Model Specific Registers with RDMSR & WRMSR PAE - Page Address Extensions Machine Check Exception COMPXCHG8B Instruction APIC SYSCALL/SYSRET or SYSENTER/SYSEXIT instructions MTRR - Memory Type Range Registers Global paging extension Machine Check Architecture Conditional Move Instruction PAT - Page Attribute Table PSE-36 - Page Size Extensions 19 - reserved MMX instructions FXSAVE/FXRSTOR 25 - reserved 26 - reserved 28 - reserved Generation: 15 Model: 11 Extended feature flags ebd3fbff: Floating Point Unit Virtual Mode Extensions Debugging Extensions Page Size Extensions Time Stamp Counter (with RDTSC and CR4 disable bit) Model Specific Registers with RDMSR & WRMSR PAE - Page Address Extensions Machine Check Exception COMPXCHG8B Instruction APIC SYSCALL/SYSRET or SYSENTER/SYSEXIT instructions MTRR - Memory Type Range Registers Global paging extension Machine Check Architecture Conditional Move Instruction PAT - Page Attribute Table PSE-36 - Page Size Extensions 20 - reserved AMD MMX Instruction Extensions MMX instructions FXSAVE/FXRSTOR 25 - reserved 27 - reserved 29 - reserved 3DNow! Instruction Extensions 3DNow instructions Processor name string: AMD Athlon(tm) 64 X2 Dual Core Processor 3800+ L1 Cache Information: 2/4-MB Pages: Data TLB: associativity 255-way #entries 8 Instruction TLB: associativity 255-way #entries 8 4-KB Pages: Data TLB: associativity 255-way #entries 32 Instruction TLB: associativity 255-way #entries 32 L1 Data cache: size 64 KB associativity 2-way lines per tag 1 line size 64 L1 Instruction cache: size 64 KB associativity 2-way lines per tag 1 line size 64 L2 Cache Information: 2/4-MB Pages: Data TLB: associativity L2 off #entries 0 Instruction TLB: associativity L2 off #entries 0 4-KB Pages: Data TLB: associativity 2-way #entries 0 Instruction TLB: associativity 2-way #entries 0 size 2 KB associativity L2 off lines per tag 129 line size 64 Advanced Power Management Feature Flags Has temperature sensing diode Supports Frequency ID control Supports Voltage ID control Maximum linear address: 48; maximum phys address 40