Command: cat decode-dimms-output.txt Memory Serial Presence Detect Decoder By Philip Edelbrock, Christian Zuckschwerdt, Burkart Lingner, Jean Delvare and others Version 2.10.2 Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0050 Guessing DIMM is in bank 1 ---=== SPD EEPROM Information ===--- EEPROM Checksum of bytes 0-62 OK (0xC9) # of bytes written to SDRAM EEPROM 128 Total number of bytes in EEPROM 256 Fundamental Memory type SDR SDRAM SPD Revision 18 ---=== Memory Characteristics ===--- Size 64 MB tCL-tRCD-tRP-tRAS 3-3-3-6 Number of Row Address Bits 12 Number of Col Address Bits 9 Number of Module Rows 1 Data Width 64 Module Interface Signal Levels LVTTL Module Configuration Type No Parity Refresh Type Self Refreshing Refresh Rate Normal (15.625 us) Primary SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 width Primary SDRAM Component Widths 8 Error Checking SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 width Error Checking SDRAM Component Widths Undefined! Min Clock Delay for Back to Back Random Access 1 Burst lengths supported 1, 2, 4, 8, Page Number of Device Banks 4 Supported CAS Latencies 2, 3 Supported CS Latencies 0 Supported WE Latencies 0 Cycle Time (CAS 3) 8 ns Access Time (CAS 3) 6 ns Cycle Time (CAS 2) 10 ns Access Time (CAS 2) 6 ns SDRAM Module Attributes (None Reported) SDRAM Device Attributes (General) Supports Auto-Precharge Supports Precharge All Supports Write1/Read Burst Lower VCC Tolerance: 10% Upper VCC Tolerance: 10% Minimum Row Precharge Time 20 ns Row Active to Row Active Min 20 ns RAS to CAS Delay 20 ns Min RAS Pulse Width 48 ns Row Densities 64 MByte Command and Address Signal Setup Time 2 ns Command and Address Signal Hold Time 1 ns Data Signal Setup Time 2 ns Data Signal Hold Time 1 ns ---=== Manufacturing Information ===--- Manufacturer Toshiba Manufacturing Location Code 0x03 Part Number THMY6480F1BEG-80 Manufacturing Date 2062-W33 Assembly Serial Number 0x120E3D02 ---=== Intel Specification ===--- Frequency 100MHz or 133MHz Details for 100MHz Support Intel Concurrent Auto-precharge CAS Latency = 2 CAS Latency = 3 Junction Temp B (90 degrees C) CLK 2 Connected CLK 0 Connected Single-sided DIMM Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0051 Guessing DIMM is in bank 2 ---=== SPD EEPROM Information ===--- EEPROM Checksum of bytes 0-62 OK (0xE0) # of bytes written to SDRAM EEPROM 128 Total number of bytes in EEPROM 256 Fundamental Memory type SDR SDRAM SPD Revision 2 ---=== Memory Characteristics ===--- Size 128 MB tCL-tRCD-tRP-tRAS 3-3-3-6 Number of Row Address Bits 12 Number of Col Address Bits 10 Number of Module Rows 1 Data Width 64 Module Interface Signal Levels LVTTL Module Configuration Type No Parity Refresh Type Self Refreshing Refresh Rate Normal (15.625 us) Primary SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 width Primary SDRAM Component Widths 8 Error Checking SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 width Error Checking SDRAM Component Widths Undefined! Min Clock Delay for Back to Back Random Access 1 Burst lengths supported 1, 2, 4, 8, Page Number of Device Banks 4 Supported CAS Latencies 2, 3 Supported CS Latencies 0 Supported WE Latencies 0 Cycle Time (CAS 3) 7.5 ns Access Time (CAS 3) 5.4 ns Cycle Time (CAS 2) 10 ns Access Time (CAS 2) 6 ns SDRAM Module Attributes (None Reported) SDRAM Device Attributes (General) Supports Auto-Precharge Supports Precharge All Supports Write1/Read Burst Lower VCC Tolerance: 10% Upper VCC Tolerance: 10% Minimum Row Precharge Time 20 ns Row Active to Row Active Min 15 ns RAS to CAS Delay 20 ns Min RAS Pulse Width 44 ns Row Densities 128 MByte Command and Address Signal Setup Time 1.5 ns Command and Address Signal Hold Time 0.8 ns Data Signal Setup Time 1.5 ns Data Signal Hold Time 0.8 ns ---=== Manufacturing Information ===--- Manufacturer Micron Technology Manufacturing Location Code 0x09 Part Number 8LSDT1664AG-133G3 Revision Code 0x0300 Manufacturing Date 2004-W24 Assembly Serial Number 0xA517E4CE ---=== Intel Specification ===--- Frequency 100MHz or 133MHz Details for 100MHz Support Intel Concurrent Auto-precharge CAS Latency = 2 CAS Latency = 3 Junction Temp A (100 degrees C) CLK 2 Connected CLK 0 Connected Single-sided DIMM Decoding EEPROM: /sys/bus/i2c/drivers/eeprom/0-0052 Guessing DIMM is in bank 3 ---=== SPD EEPROM Information ===--- EEPROM Checksum of bytes 0-62 OK (0xF6) # of bytes written to SDRAM EEPROM 128 Total number of bytes in EEPROM 256 Fundamental Memory type SDR SDRAM SPD Revision 18 ---=== Memory Characteristics ===--- Size 128 MB tCL-tRCD-tRP-tRAS 3-3-3-7 Number of Row Address Bits 12 Number of Col Address Bits 10 Number of Module Rows 1 Data Width 64 Module Interface Signal Levels LVTTL Module Configuration Type No Parity Refresh Type Self Refreshing Refresh Rate Normal (15.625 us) Primary SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 width Primary SDRAM Component Widths 8 Error Checking SDRAM Component Bank Config No Bank2 OR Bank2 = Bank1 width Error Checking SDRAM Component Widths Undefined! Min Clock Delay for Back to Back Random Access 1 Burst lengths supported 1, 2, 4, 8, Page Number of Device Banks 4 Supported CAS Latencies 2, 3 Supported CS Latencies 0 Supported WE Latencies 0 Cycle Time (CAS 3) 8 ns Access Time (CAS 3) 6 ns Cycle Time (CAS 2) 10 ns Access Time (CAS 2) 6 ns SDRAM Module Attributes (None Reported) SDRAM Device Attributes (General) Supports Auto-Precharge Supports Precharge All Supports Write1/Read Burst Lower VCC Tolerance: 10% Upper VCC Tolerance: 10% Minimum Row Precharge Time 20 ns Row Active to Row Active Min 20 ns RAS to CAS Delay 20 ns Min RAS Pulse Width 50 ns Row Densities 128 MByte Command and Address Signal Setup Time 2 ns Command and Address Signal Hold Time 1 ns Data Signal Setup Time 2 ns Data Signal Hold Time 1 ns ---=== Manufacturing Information ===--- Manufacturer Micron Technology Manufacturing Location Code 0x08 Part Number 8LSDT1664AG-10EE1 Revision Code 0x0100 Manufacturing Date 2001-W12 Assembly Serial Number 0x610898A5 ---=== Intel Specification ===--- Frequency 100MHz or 133MHz Details for 100MHz Support Intel Concurrent Auto-precharge CAS Latency = 2 CAS Latency = 3 Junction Temp A (100 degrees C) CLK 2 Connected CLK 0 Connected Single-sided DIMM Number of SDRAM DIMMs detected and decoded: 3